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MC10166 5-Bit Magnitude Comparator
The MC10166 is a high speed expandable 5-bit comparator for comparing the magnitude of two binary words. Two outputs are provided: A B. A = B can be obtained by NORing the two outputs with an additional gate. A high level on the enable function forces both outputs low. Multiple MC10166s may be used for larger word comparisons. * PD = 440 mW typ/pkg (No Load) * tpd =Data to Output 6.0 ns typ * E to output 2.5 ns typ * tr, tf = 2.0 ns typ (20%-80%)
LOGIC DIAGRAM http://onsemi.com MARKING DIAGRAMS
16 CDIP-16 L SUFFIX CASE 620 1 16 PDIP-16 P SUFFIX CASE 648 1 PLCC-20 FN SUFFIX CASE 775 2A>B A WL YY WW MC10166P AWLYYWW 1 10166 AWLYYWW MC10166L AWLYYWW
A4 9 B4 10
A3 12 B3 11
A2 13 B2 14
= Assembly Location = Wafer Lot = Year = Work Week
DIP PIN ASSIGNMENT
3AB AB L L H L 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 VCC2 E B2 A2 A3 B3 B4 A4
TRUTH TABLE
Inputs E H L L L A X
Pin assignment is for Dual-in-Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 18 of the ON Semiconductor MECL Data Book (DL122/D).
Word A = Word B Word A > Word B Word A < Word B
ORDERING INFORMATION
Device MC10166L MC10166P MC10166FN Package CDIP-16 PDIP-16 PLCC-20 Shipping 25 Units / Rail 25 Units / Rail 46 Units / Rail
(c) Semiconductor Components Industries, LLC, 2000
1
March, 2000 - Rev. 6
Publication Order Number: MC10166/D
MC10166
ELECTRICAL CHARACTERISTICS
Test Limits Pin Under Test 8 5 5 2 3 2 3 2 3 2 3 0.5 -1.060 -1.060 -1.890 -1.890 -1.080 -1.080 -1.655 -1.655 -0.890 -0.890 -1.675 -1.675 -30C Min Max 117 350 0.5 -0.960 -0.960 -1.850 -1.850 -0.980 -0.980 -1.630 -1.630 -0.810 -0.810 -1.650 -1.650 Min +25C Typ 85 Max 106 220 0.3 -0.890 -0.890 -1.825 -1.825 -0.910 -0.910 -1.595 -1.595 -0.700 -0.700 -1.615 -1.615 Min +85C Max 117 220 Unit mAdc Adc Adc Vdc Vdc Vdc Vdc ns t9+2+ t9-2- t11-2+ t11+2- t7+3+ t7-3- t15-3+ t15+3- t2+ t2- 2 2 2 2 3 3 3 3 2 2 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 8.0 8.0 8.0 8.0 8.0 8.0 3.8 3.8 3.6 3.6 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.1 1.1 6.0 6.0 6.0 6.0 6.0 6.0 2.5 2.5 2.0 2.0 7.6 7.6 7.6 7.6 7.6 7.6 3.6 3.6 3.5 3.5 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.0 1.1 1.1 8.4 8.4 8.4 8.4 8.4 8.4 4.0 4.0 3.8 3.8
Characteristic Power Supply Drain Current Input Current
Symbol IE IinH IinL
Output Voltage Output Voltage Threshold Voltage Threshold Voltage
Logic 1 Logic 0 Logic 1 Logic 0
VOH VOL VOHA VOLA
Switching Times (50 Load) Propagation Data to Output Delay
Enable to Output Rise Time Fall Time (20 to 80%) (20 to 80%)
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MC10166
ELECTRICAL CHARACTERISTICS (continued)
TEST VOLTAGE VALUES (Volts) @ Test Temperature -30C +25C +85C Pin Under Test 8 5 5 2 3 2 3 2 3 2 3 5 4 5, 15 4, 15 5 4 5 4 +1.11V t9+2+ t9-2- t11-2+ t11+2- t7+3+ t7-3- t15-3+ t15+3- t2+ 2 2 2 2 3 3 3 3 2 15 15 Pulse In 9 9 11 11 7 7 15 15 9 Pulse Out 2 2 2 2 3 3 3 3 2 15 15 5 5 VIHmax -0.890 -0.810 -0.700 VILmin -1.890 -1.850 -1.825 VIHAmin -1.205 -1.105 -1.035 VILAmax -1.500 -1.475 -1.440 VEE -5.2 -5.2 -5.2 (VCC) Gnd 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 +2.0 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16
TEST VOLTAGE APPLIED TO PINS LISTED BELOW VIHmax VILmin 4,7,10,11,14 VIHAmin VILAmax VEE 8 8 8 8 8 8 8 8 8 8 8 -3.2 V 8 8 8 8 8 8 8 8 8
Characteristic Power Supply Drain Current Input Current
Symbol IE IinH IinL
Output Voltage Output Voltage Threshold Voltage Threshold Voltage Switching Times
Logic 1 Logic 0 Logic 1 Logic 0 (50 Load)
VOH VOL VOHA VOLA
Propagation Delay Data to Output
12 12 6 6 10 10
Enable to Output Rise Time (20 to 80%)
Fall Time (20 to 80%) t2- 2 9 2 8 1, 16 Each MECL 10,000 series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 50-ohm resistor to -2.0 volts. Test procedures are shown for only one gate. The other gates are tested in the same manner.
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MC10166
APPLICATION INFORMATION FIGURE 1 -- 9-BIT MAGNITUDE COMPARATOR
B24 A24 B23 A23 B22 A22 B21 A21 B20 A20 B19 A19 B18 A18 B17 A17 B16 A16 B15 A15 B14 A14 B13 A13 B12 A12 B11 A11 B10 A10 B9 A9 B8 A8 B7 A7 B6 A6 B5 A5 B4 A4 B3 A3 B2 A2 B1 A1 B0 A0 B4 A4 B3 A3 A B A1 B0 A0 B4 A4 B3 A3 A B A1 B0 A0 B4 A4 B3 A3 A B A1 B0 A0 B4 A4 B3 A3 A B A1 B0 A0 B4 A4 B3 A3 A B A1 B0 A0 B4 A4 B3 A3 A B A1 B0 A0
A0 B0 A1 B1 A2 B2 A3 B3 A4 B4 A5 B5 A6 B6 A7 B7 A8 B8
A0 B0
A1 B1
A2 B2 MC10166
A3 B3
A4 B4
A0 B0
A1 B1
A2 B2
A3 B3
A4 B4
MC10166 AB AA>B
A>B
AA=B
For 9-Bit Word
A=B AB
FIGURE 2 -- 25-BIT MAGNITUDE COMPARATOR
The MC10166 compares the magnitude of two 5-bit words. Two outputs are provided which give a high level for A > B and A < B. The A = B function can be obtained by wire-ORing these outputs (a low level indicates A = B) or by NORing the outputs (a high level indicates A = B). For longer word lengths, the MC10166 can be serially expanded or cascaded. Figure 1 shows two devices in a serial expansion for a 9-bit word length. The A > B and A < B outputs are fed to the A0 and B0 inputs respectively of the next device. The connection for an A = B output is also shown. The worst case delay time of serial expansion is equal to the number of comparators times the data-to-output delay. For shorter delay times than possible with serial expansion, devices can be cascaded. Figure 2 shows a 25-bit cascaded comparator whose worst case delay is two data-to-output delays. The cascaded scheme can be extended to longer word lengths.
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MC10166
PACKAGE DIMENSIONS
PLCC-20 FN SUFFIX PLASTIC PLCC PACKAGE CASE 775-02 ISSUE C
B -N- Y BRK D -L- -M- W D X V A Z R 0.007 (0.180) M T L-M
S
0.007 (0.180) M T L-M U
S
N
S S
0.007 (0.180) M T L-M
N
S
Z
20
1
G1
0.010 (0.250)
S
T L-M
S
N
S
VIEW D-D 0.007 (0.180) M T L-M
S
N N
S
H
0.007 (0.180) M T L-M
S
N
S
S
K1 K
C
E 0.004 (0.100) G G1 0.010 (0.250) S T L-M J -T-
SEATING PLANE
F VIEW S
NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635).
0.007 (0.180) M T L-M
S
N
S
VIEW S
S
N
S
DIM A B C E F G H J K R U V W X Y Z G1 K1
INCHES MIN MAX 0.385 0.395 0.385 0.395 0.165 0.180 0.090 0.110 0.013 0.019 0.050 BSC 0.026 0.032 0.020 --- 0.025 --- 0.350 0.356 0.350 0.356 0.042 0.048 0.042 0.048 0.042 0.056 --- 0.020 2_ 10 _ 0.310 0.330 0.040 ---
MILLIMETERS MIN MAX 9.78 10.03 9.78 10.03 4.20 4.57 2.29 2.79 0.33 0.48 1.27 BSC 0.66 0.81 0.51 --- 0.64 --- 8.89 9.04 8.89 9.04 1.07 1.21 1.07 1.21 1.07 1.42 --- 0.50 2_ 10 _ 7.88 8.38 1.02 ---
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MC10166
PACKAGE DIMENSIONS
CDIP-16 L SUFFIX CERAMIC DIP PACKAGE CASE 620-10 ISSUE T
-A-
16 9
-B-
1 8
C
L
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION F MAY NARROW TO 0.76 (0.030) WHERE THE LEAD ENTERS THE CERAMIC BODY. DIM A B C D E F G H K L M N INCHES MIN MAX 0.750 0.785 0.240 0.295 --- 0.200 0.015 0.020 0.050 BSC 0.055 0.065 0.100 BSC 0.008 0.015 0.125 0.170 0.300 BSC 0_ 15 _ 0.020 0.040 MILLIMETERS MIN MAX 19.05 19.93 6.10 7.49 --- 5.08 0.39 0.50 1.27 BSC 1.40 1.65 2.54 BSC 0.21 0.38 3.18 4.31 7.62 BSC 0_ 15 _ 0.51 1.01
-T-
SEATING PLANE
N E F D G
16 PL
K M J
16 PL
0.25 (0.010)
M
M
TB
S
0.25 (0.010)
TA
S
-A-
16 9
PDIP-16 P SUFFIX PLASTIC DIP PACKAGE CASE 648-08 ISSUE R
B
1
8
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. 5. ROUNDED CORNERS OPTIONAL. DIM A B C D F G H J K L M S INCHES MIN MAX 0.740 0.770 0.250 0.270 0.145 0.175 0.015 0.021 0.040 0.70 0.100 BSC 0.050 BSC 0.008 0.015 0.110 0.130 0.295 0.305 0_ 10 _ 0.020 0.040 MILLIMETERS MIN MAX 18.80 19.55 6.35 6.85 3.69 4.44 0.39 0.53 1.02 1.77 2.54 BSC 1.27 BSC 0.21 0.38 2.80 3.30 7.50 7.74 0_ 10 _ 0.51 1.01
F S
C
L
-T- H G D
16 PL
SEATING PLANE
K
J TA
M
M
0.25 (0.010)
M
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MC10166
Notes
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MC10166
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PUBLICATION ORDERING INFORMATION
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MC10166/D

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